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Preliminary Technical Data
FEATURES
SFP/SFF and SFF-8472 MSA-compliant SFP reference design available 50 Mbps to 4.25 Gbps operation Multirate 155 Mbps to 4.25 Gbps operation Automatic average power control Typical rise/fall time 60 ps Bias current range 2 mA to 100 mA Modulation current range 5 mA to 90 mA Laser fail alarm and automatic laser shutdown (ALS) Bias and modulation current monitoring 3.3 V operation 4 mm x 4 mm LFCSP package Voltage setpoint control Resistor setpoint control Pin-compatible with ADN2870
3.3 V, 50 Mbps to 3.3 Gbps Single-Loop Laser Diode Driver ADN2871
GENERAL DESCRIPTION
The ADN2871 laser diode driver is designed for advanced SFP and SFF modules, using SFF-8472 digital diagnostics. The ADN2871 supports single-rate or multi-rate operation from 50 Mbps to 4.25 Gbps. Average power and extinction ratio can be set with a voltage provided by a microcontroller DAC or by a trimmable resistor or digipot. Average power control-loop is implemented using feedback from a monitor photodiode. The part provides bias and modulation current monitoring as well as fail alarms and automatic laser shutdown. The device interfaces easily with the ADI ADuC70xx family of microconverters and with the ADN289x family of limiting amplifiers to make a complete SFP/SFF transceiver solution. An SFP reference design is available. The product is pin compatible with the ADN2870 Dual Loop LDD allowing one PC board layout to work with either device. For dual loop applications, refer to the ADN2870 datasheet. The product is available in a space-saving 4 mm x4 mm LFCSP package specified over the -40C to +85C temperature range.
APPLICATIONS
Multirate OC3 to OC48-FEC SFP/SFF modules 1x/2x/4x Fibre channel SFP/SFF modules LX-4 modules DWDM/CWDM SFP modules 1GE SFP/SFF transceiver modules
VCC
Tx_DISABLE Tx_FAULT VCC MPD FAIL ALS
VCC
VCC VCC L
IMODN
R IMODP
LASER
DATAP ADI MICROCONTROLLER DAC ADC 1k DAC GND ERREF IMOD 1k ERSET PAVSET CONTROL PAVREF IBIAS RPAV X 100 NC 100 DATAN
ADN2871
IBMON VCC GND GND 1k GND 470 GND GND
04510-001
GND IMMON PAVCAP ERCAP
Figure 1. Application Diagram Showing Microcontroller Interface
Protected by US patent: US6414974
Rev. PrA
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 (c) 2004 Analog Devices, Inc. All rights reserved.
ADN2871 TABLE OF CONTENTS
Specifications....................................................................................... SFP Timing Specifications................................................................. Absolute Maximum Ratings.............................................................. ESD Caution.................................................................................... Pin Configuration and Function Descriptions............................... Typical Operating Characteristics.................................................... Optical Waveforms Showing Multirate Performance Using Low Cost Fabry Perot Tosa NEC NX7315UA ............................ Optical Waveforms Showing Dual-Loop Performance Over Temperature Using DFB Tosa SUMITOMO SLT2486.............. Performance Characteristics......................................................... Theory of Operation .......................................................................... Control............................................................................................. ...........................................................................................................
Preliminary Technical Data
Voltage Setpoint Calibration.......................................................... Resistor Setpoint Calibration......................................................... IMPD Monitoring ........................................................................... Loop Bandwidth Selection............................................................. Power Consumption ....................................................................... Automatic Laser Shutdown (TX_Disable)................................... Bias and Modulation Monitor Currents....................................... Data Inputs....................................................................................... Laser Diode Interfacing.................................................................. Alarms............................................................................................... Outline Dimensions ............................................................................ Ordering Guide ...............................................................................
REVISION HISTORY
Revision 0: Initial Version
Rev. PrA | Page 2 of 19
Preliminary Technical Data SPECIFICATIONS
VCC = 3.0 V to 3.6 V. All specifications TMIN to TMAX,1 unless otherwise noted. Typical values as specified at 25C. Table 1.
Parameter LASER BIAS CURRENT (IBIAS) Output Current IBIAS Compliance Voltage IBIAS when ALS is High CCBIAS Compliance Voltage MODULATION CURRENT (IMODP, IMODN)2 Output Current IMOD Compliance Voltage IMOD when ALS is High Rise Time2, 3 Fall Time2, 3 Random Jitter2, 3 Deterministic Jitter2, 3 Pulse-Width Distortion2, 3 AVERAGE POWER SET (PAVSET) Pin Capacitance Voltage Photodiode Monitor Current (Average Current) EXTINCTION RATIO SET INPUT (ERSET) Resistance Range Resistance Range AVERAGE POWER REFERENCE VOLTAGE INPUT (PAVREF) Voltage Range Photodiode Monitor Current (Average Current) EXTINCTION RATIO REFERENCE VOLTAGE INPUT (ERREF) Voltage Range DATA INPUTS (DATAP, DATAN)4 V p-p (Differential) Input Impedance (Single-Ended) LOGIC INPUTS (ALS) VIH VIL ALARM OUTPUT (FAIL)5 VOFF VON Min 2 1.2 1.2 5 1.5 60 60 0.8 90 VCC 0.05 104 96 1.1 35 30 80 1.35 1200 25 1.01 1 1000 Typ Max 100 VCC 0.2 Unit mA V mA V mA V mA ps ps ps ps ps pF V A k k V A
ADN2871
Conditions/Comments
rms 20 mA < IMOD < 90 mA 20 mA < IMOD < 90 mA
1.1 50 1.49 0.99 0.12 120
1.2
Resistor setpoint mode Resistor setpoint mode Voltage setpoint mode Voltage setpoint mode (RPAV fixed at 1 k) Voltage setpoint mode (RPAV fixed at 1 k) Voltage setpoint mode (RERSET fixed at 1 k) AC-coupled
1.0
0.05
0.9
V
0.4 50 2
2.4
V V V V V
0.8 > 1.8 < 1.3
Voltage required at FAIL for Ibias and Imod to turn off when FAIL asserted Voltage required at FAIL for Ibias and Imod to stay on when FAIL asserted
Rev. PrA | Page 3 of 19
ADN2871
Parameter IBMON, IMMON DIVISION RATIO IBIAS/IBMON3 IBIAS/IBMON3 IBIAS/IBMON STABILITY3, 6 IMOD/IMMON IBMON Compliance Voltage SUPPLY ICC7 VCC (w.r.t. GND)8 Min 85 92 Typ 100 100 50 0 30 3.3 1.3 Max 115 108 5
Preliminary Technical Data
Unit A/A A/A % A/A V mA V Conditions/Comments 11 mA < IBIAS < 50 mA 50 mA < IBIAS < 100 mA 10 mA < IBIAS < 100 mA
When IBIAS = IMOD = 0
3.0
3.6
1 2
Temperature range: -40C to +85C. Measured into a 15 load (22 resistor in parallel with digital scope 50 input) using a 11110000 pattern at 2.5 Gbps, shown in Figure 2. 3 Guaranteed by design and characterization. Not production tested. 4 When the voltage on DATAP is greater than the voltage on DATAN, the modulation current flows in the IMODP pin. 5 Guaranteed by design. Not production tested. 6 IBIAS/IBMON ratio stability is defined in SFF-8472 revision 9 over temperature and supply variation. 7 ICC min for power calculation in the Power Consumption section. 8 All VCC pins should be shorted together.
VCC
VCC
ADN2871
IMODP
R 22
L C BIAS TEE 80kHz 27GHz
Figure 2. High Speed Electrical Test Output Circuit
Rev. PrA | Page 4 of 19
04510-034
TO HIGH SPEED DIGITAL OSCILLOSCOPE 50 INPUT
Preliminary Technical Data SFP TIMING SPECIFICATIONS
Table 2.
Parameter ALS Assert Time ALS Negate Time1 Time to Initialize, Including Reset of FAIL1 FAIL Assert Time ALS to Reset time Symbol t_off t_on t_init t_fault t_reset Min Typ 1 0.83 25 Max 5 0.95 275 100 5 Unit s ms ms s s
ADN2871
Conditions/Comments Time for the rising edge of ALS (TX_DISABLE) to when the bias current falls below 10% of nominal. Time for the falling edge of ALS to when the modulation current rises above 90% of nominal. From power-on or negation of FAIL using ALS. Time to fault to FAIL on. Time TX_DISABLE must be held high to reset TX_FAULT.
1
Guaranteed by design and characterization. Not production tested.
VSE DATAP DATAN
SFP MODULE
1H VCC_Tx 0.1F 0.1F 10F
04510-003
3.3V
SFP HOST BOARD
DATAP-DATAN 0V
04510-002
V p-p DIFF = 2 x VSE
Figure 4. Recommended SFP Supply
Figure 3. Signal Level Definition
Rev. PrA | Page 5 of 19
ADN2871 ABSOLUTE MAXIMUM RATINGS
TA = 25C, unless otherwise noted. Table 3.
Parameter VCC to GND IMODN, IMODP PAVCAP ERCAP PAVSET PAVREF ERREF IBIAS IBMON IMMON ALS CCBIAS RPAV ERSET FAIL DATAP, DATAN (single-ended differential) Junction Temperature Rating 4. 2 V -0.3 V to +4.8 V -0.3 V to +3.9 V -0.3 V to +3.9 V -0.3 V to +3.9 V -0.3 V to +3.9 V -0.3 V to +3.9 V -0.3 V to +3.9 V -0.3 V to +3.9 V -0.3 V to +3.9 V -0.3 V to +3.9 V -0.3 V to +3.9 V -0.3 V to +3.9 V -0.3 V to +3.9 V -0.3 V to +3.9 V 1.5 V 150C
Preliminary Technical Data
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Rev. PrA | Page 6 of 19
Preliminary Technical Data TEMPERATURE SPECIFICATIONS
JA Thermal Impedance2 JCThermal Impedance Lead Temperature (Soldering 10 s)
ADN2871
30C/W 29.5C/W 300C
___________________ 1 Power consumption equations are provided in the Power Consumption section.
2
TEMPERATURE SPECIFICATIONS Operating Temperature Range Industrial Storage Temperature Range Junction Temperature (TJ max) LFCSP Package Power Dissipation1
JA is defined when part is soldered on a 4-layer board.
-40C to +85C -65C to +150C 125C (TJ max - TA)/JA W
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. PrA | Page 7 of 19
ADN2871 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
IMMON ERREF
18 19
Preliminary Technical Data
ERSET RPAV IBMON
FAIL
VCC
13 12
GND VCC IMODP IMODN GND IBIAS
24 1
ALS DATAN DATAP
ADN2871
GND PAVCAP ERCAP
7
PAVSET
GND
VCC
NC
PAVREF
6
04510-004
Figure 5. Pin Configuration- Top View
Table 4. Pin Fuction Descriptions
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Mnemonic NC PAVSET GND VCC PAVREF RPAV ERCAP PAVCAP GND DATAP DATAN ALS ERSET IMMON ERREF VCC IBMON FAIL GND VCC IMODP IMODN GND IBIAS Description No Connect Average Optical Power Set Pin Supply Ground Supply Voltage Reference Voltage Input for Average Optical Power Control Average Power Resistor when Using PAVREF TBD Average Power Loop Capacitor Supply Ground Data, Positive Differential Input Data, Negative Differential Input Automatic Laser Shutdown Extinction Ratio Set Pin Modulation Current Monitor Current Source Reference Voltage Input for Extinction Ratio Control Supply Voltage Bias Current Monitor Current Source FAIL Alarm Output Supply Ground Supply Voltage Modulation Current Positive Output, Connect to Laser Diode Modulation Current Negative Output Supply Ground Laser Diode Bias (Current Sink to Ground)
Note: The LFCSP package has an exposed paddle that must be connected to ground.
Rev. PrA | Page 8 of 19
Preliminary Technical Data TYPICAL OPERATING CHARACTERISTICS
VCC = 3.3 V and TA = 25C, unless otherwise noted.
ADN2871
OPTICAL WAVEFORMS SHOWING MULTIRATE PERFORMANCE USING LOW COST FABRY PEROT TOSA NEC NX7315UA
Note: No change to PAVCAP and ERCAP values
(ACQ LIMIT TEST) WAVEFORMS 1000
(ACQ LIMIT TEST) WAVEFORMS 1000
Figure 8. Optical Eye 155 Mbps,1.078 ns/div, PRBS 231-1 PAV = -4.5 dBm, ER = 9 dB, Mask Margin 50%
04510-016
EXTINCTION RATIO PERFORMANCE OVER TEMPERATURE USING DFB TOSA ?????
Figure 6. Optical Eye 2.488 Gbps,65 ps/div, PRBS 231-1 PAV = -4.5 dBm, ER = 9 dB, Mask Margin 25%
(ACQ LIMIT TEST) WAVEFORMS 1000
Figure 9. Drift of Imod versus Temperature
Figure 7. Optical Eye 622 Mbps, 264 ps/div, PRBS 231-1 PAV = -4.5 dBm, ER = 9 dB, Mask Margin 50% Figure 10. Honeywekk VCSEL eye
04510-017
Rev. PrA | Page 9 of 19
04510-020
ADN2871
PERFORMANCE CHARACTERISTICS
90 1.2
Preliminary Technical Data
1.0
60
RISE TIME (ps) JITTER (rms)
0.8
0.6
30
0.4
0.2
04510-022 04510-037
0 0 20 40 60 MODULATION CURRENT (mA) 80
0 0 20 40 60 MODULATION CURRENT (mA) 80
100
100
Figure 11. Rise Time vs. Modulation Current, Ibias = 20 mA
80
Figure 14. Random Jitter vs. Modulation Current, Ibias = 20 mA
250
220
TOTAL SUPPLY CURRENT (mA)
60
FALL TIME (ps)
IBIAS = 80mA 190 IBIAS = 40mA
160
40
130 IBIAS = 20mA 100
20
04510-025
0 0 20 40 60 MODULATION CURRENT (mA) 80
40 0 20 40 60 MODULATION CURRENT (mA) 80
100
100
Figure 12. Fall Time vs. Modulation Current, Ibias = 20 mA
Figure 15. Total Supply Current vs. Modulation Current Total Supply Current = ICC + Ibias + Imod
60 55 50 45 40 35 30
04510-027
45 40
DETERMINISTIC JITTER (ps)
35 30 25 20 15 10 5 0 20
04510-042
SUPPLY CURRENT (mA)
25 20 -50
40 60 80 MODULATION CURRENT (mA)
100
-30
-10
10 30 50 TEMPERATURE (C)
70
90
110
Figure 13. Deterministic Jitter vs. Modulation Current, Ibias = 20 mA
Figure 16. Supply Current (ICC) vs. Temperature with ALS Asserted, Ibias = 20 mA
Rev. PrA | Page 10 of 19
04510-038
70
Preliminary Technical Data
120 115 110 105 100 95 90
44
04510-028
ADN2871
60 58 56
IMOD/IMMON RATIO
IBIAS/IBMON RATIO
54 52 50 48 46
42 40 -50 -30 -10 10 30 50 TEMPERATURE (C) 70 90
80 -50
-30
-10
10 30 50 TEMPERATURE (C)
70
90
110
110
Figure 17. IBIAS/IBMON Gain vs. Temperature, Ibias = 20 mA
Figure 20. IMOD/IMMON Gain vs. Temperature, Imod = 30 mA
OC48 PRBS31 DATA TRANSMISSION
t_OFF LESS THAN 1s
FAIL ASSERTED
FAULT FORCED ON PAVSET
ALS
04510-029 04510-045
Figure 18. ALS Assert Time, 5 s/div
Figure 21. FAIL Assert Time,1 s/div
OC48 PRBS31 DATA TRANSMISSION
TRANSMISSION ON
t_ON
ALS
POWER SUPPLY TURN ON
04510-032 04510-046
Figure 19. ALS Negate Time, 200 s/div
Figure 22. Time to Initialize, Including Reset, 40 ms/div
Rev. PrA | Page 11 of 19
04510-031
85
ADN2871 THEORY OF OPERATION
Laser diodes have a current-in to light-out transfer function as shown in Figure 23. Two key characteristics of this transfer function are the threshold current, Ith, and slope in the linear region beyond the threshold current, referred to as slope efficiency, LI.
P1 PO P1 + PO PAV = 2 ER =
Preliminary Technical Data
CONTROL METHODS
The ADN2871 has two methods for setting the average power (PAV) and extinction ratio (ER). The average power and extinction ratio can be voltage-set using a microcontroller's voltage DACs outputs to provide controlled reference voltages PAVREF and ERREF. Alternatively, the average power and extinction ratio can be resistor-set using potentiometers at the PAVSET and ERSET pins, respectively.
OPTICAL POWER
P1
PAV
P I P LI = I
VOLTAGE SETPOINT CALIBRATION
The ADN2871 allows interface to a microcontroller for both control and monitoring (see Figure 24). The average power and extinction ratio can be set using the microcontroller's DACs to provide controlled reference voltages PAVREF and ERREF.
PAVREF = PAV x RSP x RPAV (Volts)
PO Ith CURRENT
Figure 23. Laser Transfer Function
04510-005
LASER CONTROL
Typically laser threshold current and slope efficiency are both functions of temperature. For FP and DFB type lasers the threshold current increases and the slope efficiency decreases with increasing temperature. In addition, these parameters vary as the laser ages. To maintain a constant optical average power and a constant optical extinction ratio over temperature and laser lifetime, it is necessary to vary the applied electrical bias current and modulation current to compensate for the lasers changing LI characteristics.
ERREF =
IMOD x R ERSET (Volts) 100
where: RSP = Impd/(Laser output power) PAV is the average power required. RPAV = RERSET = 1kOhm IMOD = Modulation current In voltage setpoint mode, RPAV and RERSET must be 1 k resistors with a 1% tolerance and a temperature coefficient of 50 ppm/C. Note that during power up, there is an internal sequence that allows 25 ms before enabling the alarms; therefore the customer must ensure that the voltage for PAVREF and ERREF are active within 20 ms after ramp-up of the power supply.
Average Power Control Loop (APCL)
The APCL compensates for changes in Ith and LI by varying Ibias. Average power control is performed by measuring MPD current, Impd. This current is bandwidth-limited by the MPD. This is not a problem because the APCL is required to respond to the average current from the MPD.
Extinction Ratio (ER) Control
ER control is implemented by adjusting the Modulation current. Temperature-calibration is required in order to adjust the Modulation current to compensate for variation of the laser characteristics with temperature.
Rev. PrA | Page 12 of 19
Preliminary Technical Data
VCC VCC VCC VCC L VCC MPD FAIL ALS IMODN R IMODP DATAP ADI MICROCONTROLLER DAC ADC 1k DAC GND ERREF IMOD 1k ERSET PAVSET CONTROL PAVREF IBIAS RPAV X 100 NC 100 DATAN LASER Tx_FAULT Tx_FAIL
ADN2871
ADN2871
IBMON VCC GND GND 1k GND 470 GND GND
04510-001
GND IMMON PAVCAP ERCAP
Figure 24. ADN2871 Using Microconverter Calibration and Monitoring
VCC
VCC
VCC L VCC LASER
FAIL VCC VCC PAVREF MPD RPAV
ALS
IMODN
R IMODP
DATAP DATAN
100 PAVSET VCC GND ERREF Vref ERSET X 100 IMOD NC CONTROL IBIAS
ADN2870
PAVCAP ERCAP GND
GND VCC GND
IBMON 1k GND
IMMON 470 GND
Figure 25. ADN2871 Using Resistor Setpoint Calibration of Average Power and Extinction Ratio
Rev. PrA | Page 13 of 19
04510-010
GND
ADN2871
RESISTOR SETPOINT CALIBRATION
In resistor setpoint calibration. PAVREF, ERREF, and RPAV must all be tied to VCC. Average power and extinction ratio can be set using the PAVSET and ERSET pins, respectively. A resistor is placed between the pin and GND to set the current flowing in each pin as shown in Figure 25. The ADN2871 ensures that both PAVSET and ERSET are kept 1.23 V above GND. The PAVSET and ERSET resistors are given by the following:
RPAVSET = 1.23 V PAV x RSP
Preliminary Technical Data
differential measurement across a sense resistor directly in series with the IMPD. As shown in Figure 27, a small resistor, Rx, is placed in series with the IMPD. If the laser used in the design has a pinout where the monitor photodiode cathode and the lasers anode are not connected, a sense resistor can be placed in series with the photodiode cathode and VCC as shown in Figure 28. When choosing the value of the resistor, the user must take into account the expected IMPD value in normal operation. The resistor must be large enough to make a significant signal for the buffered A/Ds to read, but small enough so as not to cause a significant voltage reduction across the IMPD. The voltage across the sense resistor should not exceed 250 mV when the laser is in normal operation. It is recommended that a 10 pF capacitor be placed in parallel with the sense resistor.
VCC
()
R ERSET =
1.23 Vx 100 () IMOD
where: RSP = Impd/(Laser output power) IMOD is the modulation current required. PAV is the average power required
PHOTODIODE
LD
C ADC DIFFERENTIAL INPUT
200 RESISTOR
10pF
IMPD MONITORING
IMPD monitoring can be implemented for voltage setpoint and resistor setpoint as follows.
PAVSET
ADN2871
Voltage Setpoint
In voltage setpoint calibration, the following methods may be used for IMPD monitoring. Method 1: Measuring Voltage at RPAV The IMPD current is equal to the voltage at RPAV divided by the value of RPAV (see Figure 26) as long as the laser is on and is being controlled by the control loop. This method does not provide a valid IMPD reading when the laser is in shut-down or fail mode. A microconverter buffered A/D input may be connected to RPAV to make this measurement. No decoupling or filter capacitors should be placed on the RPAV node because this can disturb the control loop.
VCC PHOTODIODE PAVSET
Figure 27. Differential Measurement of IMPD Across a Sense Resistor
VCC
VCC
200 RESISTOR
C ADC
INPUT PHOTODIODE
LD
PAVSET
ADN2871
Figure 28. Single Measurement of IMPD Across a Sense Resistor
Resistor Setpoint
In resistor setpoint calibration, the current through the resistor from PAVSET to ground is the IMPD current. The recommended method for measuring the IMPD current is to place a small resistor in series with PAVSET resistor (or potentiometer) and measure the voltage across this resistor as shown in Figure 29. The IMPD current is then equal to this voltage divided by the value of resistor used. In resistor setpoint, PAVSET is held to 1.2 V nominal; it is recommended that the sense resistor should be selected so that the voltage across the sense resistor does not exceed 250 mV.
ADN2871
C ADC
INPUT
04510-043
RPAV R 1k
Figure 26. Single Measurement of IMPD RPAV in Voltage Setpoint Mode
Method 2: Measuring IMPD Across a Sense Resistor The second method has the advantage of providing a valid IMPD reading at all times, but has the disadvantage of requiring a
Rev. PrA | Page 14 of 19
04510-012
04510-011
Preliminary Technical Data
VCC PHOTODIODE PAVSET
ADN2871
ICC = ICC min + 0.3 IMOD P = VCC x ICC + (IBIAS x VBIAS_PIN) + IMOD (VMODP_PIN + VMODN_PIN)/2 TDIE = TAMBIENT + JA x P
ADN2871
C ADC
INPUT
04510-040
R
Thus, the maximum combination of IBIAS + IMOD must be calculated. where: ICC min = 30 mA, the typical value of ICC provided in the Specifications with IBIAS = IMOD = 0. TDIE is the die temperature. TAMBIENT is the ambient temperature. VBIAS_PIN is the voltage at the IBIAS pin. VMODP_PIN is the voltage at the IMODP pin. VMODN_PIN is the voltage at the IMODN pin.
Figure 29. Single Measurement of IMPD Across a Sense Resistor in Resistor Setpoint IMPD Monitoring
LOOP BANDWIDTH SELECTION
To ensure that the ADN2871 control loop has sufficient bandwidth, the average power loop capacitor (PAVCAP) is calculated using the lasers slope efficiency (watts/amps) and the average power required. For resistor setpoint control:
PAVCAP = 3.2 E - 6 x LI (Farad) PAV
AUTOMATIC LASER SHUTDOWN (TX_DISABLE)
ALS (TX disable) is an input that is used to shut down the transmitter optical output. The ALS pin is pulled up internally with a 6 k resistor, and conforms to SFP MSA specification. When ALS is logic high or when open, both the bias and modulation currents are turned off.
For voltage setpoint control:
PAVCAP = 1.28 E - 6 x LI (Farad) PAV
where PAV is the average power required and LI (mW/mA) is the typical slope efficiency at 25C of a batch of lasers that are used in a design. The capacitor value equation is used to get a centered value for the particular type of laser that is used in a design and average power setting. The laser LI can vary by a factor of 7 between different physical lasers of the same type and across temperature without the need to recalculate the PAVCAP and ERCAP values. In ac coupling configuration the LI can be calculated as follows:
LI = P1 - P0 (mW/mA) Imod
BIAS AND MODULATION MONITOR CURRENTS
IBMON and IMMON are current-controlled current sources that mirror a ratio of the bias and modulation current. The monitor bias current, IBMON, and the monitor modulation current, IMMON, should both be connected to ground through a resistor to provide a voltage proportional to the bias current and modulation current, respectively. When using a microcontroller, the voltage developed across these resistors can be connected to two of the ADC channels, making available a digital representation of the bias and modulation current.
DATA INPUTS
Data inputs should be ac-coupled (10 nF capacitors are recommended) and are terminated via a 100 internal resistor between the DATAP and DATAN pins. A high impedance circuit sets the common-mode voltage and is designed to allow maximum input voltage headroom over temperature. It is necessary to use ac coupling to eliminate the need for matching between common-mode voltages.
where P1 is the optical power (mW) at the one level, and P0 is the optical power (mW) at the zero level. This capacitor is placed between the PAVCAP pin and ground. It is important that the capacitor is a low leakage multilayer ceramic with an insulation resistance greater than 100 G or a time constant of 1000 sec, whichever is less. Pick a standard offthe-shelf capacitor value such that the actual capacitance is within +/-30% of the calculated value after the capacitors own tolerance is taken into account.
POWER CONSUMPTION
The ADN2871 die temperature must be kept below 125C. The LFCSP package has an exposed paddle, which should be connected such that is at the same potential as the ADN2871 ground pins. Power consumption can be calculated as follows:
Rev. PrA | Page 15 of 19
ADN2871
LASER DIODE INTERFACING
The schematic in Figure 30 describes the recommended circuit for interfacing the ADN2871 to most TO-Can or Coax lasers. These lasers typically have impedances of 5 to 7 , and have axial leads. The circuit shown works over the full range of data rates from 155 Mbps to 3.3 Gbps including multirate operation (with no change to PAVCAP and ERCAP values); see the Typical Operating Characteristics for multirate performance examples. Coax lasers have special characteristics that make them difficult to interface to. They tend to have higher inductance, and their impedance is not well controlled. The circuit in Figure 30 operates by deliberately misterminating the transmission line on the laser side, while providing a very high quality matching network on the driver side. The impedance of the driver side matching network is very flat versus frequency and enables multirate operation. A series damping resistor should not be used.
VCC L (0.5nH) RP 24 IMODP C 100nF Tx LINE 30 R 24 C 2.2pF L BLMI8HG60ISN1D
04510-014
Preliminary Technical Data
The 30 transmission line used is a compromise between drive current required and total power consumed. Other transmission line values can be used, with some modification of the component values. The R and C snubber values in Figure 30, 24 and 2.2 pF, respectively, represent a starting point and must be tuned for the particular model of laser being used. RP, the pull-up resistor is in series with a very small (0.5 nH) inductor. In some cases, an inductor is not required or can be accommodated with deliberate parasitic inductance, such as a thin trace or a via, placed on the PC board. Care should be taken to mount the laser as close as possible to the PC board, minimizing the exposed lead length between the laser can and the edge of the board. The axial lead of a coax laser are very inductive (approximately 1 nH per mm). Long exposed leads result in slower edge rates and reduced eye margin. Recommended component layouts and gerber files are available by contacting the factory. Note that the circuit in Figure 30 can supply up to 56 mA of modulation current to the laser, sufficient for most lasers available today. Higher currents can be accommodated by changing transmission lines and backmatch values; contact factory for recommendations. This interface circuit is not recommended for butterfly-style lasers or other lasers with 25 characteristic impedance. Instead, a 25 transmission line and inductive (instead of resistive) pull-up is recommended; contact the factory for recommendations. The ADN2871 also supports differential drive schemes. These can be particularly useful when driving VCSELs or other lasers with slow fall times. Differential drive can be implemented by adding a few extra components. A possible implementation is shown in Figure 31.
VCC
ADN2871
IBIAS
Tx LINE 30
Figure 30. Recommended Interface for ADN2871 AC Coupling
VCC L1 = 0.5nH L4 = BLM18HG601SN1
R1 = 15 IMODN
C1 = C2 = 100nF
L3 = 4.7nH
TOCAN/VCSEL
ADN2871
IMODP IBIAS
20 TRANMISSION LINES
R3
C3 SNUBBER
LIGHT
R1 = 15 (12 TO 24) L2 = 0.5nH VCC
04510-041
L6 = BLM18HG601SN1
SNUBBER SETTINGS: 40 AND 1.5pF, NOT OPTIMIZED, OPTIMIZATION SHOULD CONSIDER PARASITIC.
Figure 31. Recommended Differential Drive Circuit
Rev. PrA | Page 16 of 19
Preliminary Technical Data
ALARMS
The ADN2871 has a latched active high monitoring alarm (FAIL). The FAIL alarm output is an open drain in conformance to SFP MSA specification requirements. The ADN2871 has a 3-fold alarm system that covers * * Use of a bias current higher than expected, probably as a result of laser aging. Out-of-bounds average voltage at the monitor photodiode (MPD) input, indicating an indicating an excessive amount of laser power or a broken loop. *
ADN2871
Undervoltage in IBIAS node (laser diode cathode) that would increase the laser power.
The bias current alarm trip point is set by selecting the value of resistor on the IBMON pin to GND. The alarm is triggered when the voltage on the IBMON pin goes above 1.2 V. FAIL is activated when the single-point faults in Table 5 occur.
Table 5. ADN2871 Single-Point Alarms
Alarm Type 1. Bias Current 2. MPD Current 3. Crucial Nodes Pin Name IBMON PAVSET ERREF IBIAS Over Voltage or Short to VCC Condition Alarm if > 1.2 V Alarm if > 1.7 V Alarm if shorted to VCC Ignore Under Voltage or Short to GND Condition Ignore Alarm if < 0.9 V Alarm if shorted to GND Alarm if < 400 mV
Table 6. ADN2871 Response to Various Single-Point Faults in AC-Coupled Configuration as Shown in Figure 30
Pin CCBIAS PAVSET PAVREF RPAV Short to VCC Fault state occurs Fault state occurs Voltage mode: Fault state occurs Resistor mode: Tied to VCC Voltage mode: Fault state occurs Resistor mode: Tied to VCC Does not increase laser average power Fault state occurs Does not increase laser average power Does not increase laser average power Output currents shut off Does not increase laser average power Does not affect laser power Voltage mode: Fault state occurs Resistor mode: Tied to VCC Fault state occurs Fault state occurs Does not increase laser average power Does not increase laser average power Fault state occurs Short to GND Fault state occurs Fault state occurs Fault state occurs Fault state occurs Open Does not increase laser average power Fault state occurs Fault state occurs Voltage mode: Fault state occurs Resistor mode: Does not increase average power Does not increase laser average power Fault state occurs Does not increase laser average power Does not increase laser average power Output currents shut off Does not increase laser average power Does not increase laser average power Does not increase laser average power
ERCAP PAVCAP DATAP DATAN ALS ERSET IMMON ERREF
IBMON FAIL IMODP IMODN IBIAS
Does not increase laser average power Fault state occurs Does not increase laser average power Does not increase laser average power Normal currents Does not increase laser average power Does not increase laser average power Voltage mode: Does not increase average power Resistor mode: Fault state occurs Does not increase laser average power Does not increase laser average power Does not increase laser average power Does not increase laser average power Fault state occurs
Does not increase laser average power Does not increase laser average power Does not increase laser average power Does not increase laser power Fault state occurs
Rev. PrA | Page 17 of 19
ADN2871 OUTLINE DIMENSIONS
4.00 BSC SQ 0.60 MAX 0.60 MAX
19 18 24 1
Preliminary Technical Data
PIN 1 INDICATOR 2.25 2.10 SQ 1.95
6
PIN 1 INDICATOR
TOP VIEW
3.75 BSC SQ
0.50 BSC 0.50 0.40 0.30
BOTTOM VIEW
13 12 7
0.25 MIN 2.50 REF
1.00 0.85 0.80
12 MAX
0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM 0.30 0.23 0.18 0.20 REF COPLANARITY 0.08
SEATING PLANE
COMPLIANT TO JEDEC STANDARDS MO-220-VGGD-2
Figure 32. 24-Lead Lead Frame Chip Scale Package [LFCSP] (CP-24) Dimensions shown in millimeters
Note: The LFCSP package has an exposed paddle that must be connected to ground.
ORDERING GUIDE
Model ADN2871ACPZ1 ADN2871ACPZ-RL1 ADN2871ACPZ-RL71 Temperature Range -40C to +85C -40C to +85C -40C to +85C Package Description 24-Lead Lead Frame Chip Scale Package 24-Lead Lead Frame Chip Scale Package 24-Lead Lead Frame Chip Scale Package Package Option CP-24 CP-24 CP-24
1
Z = Pb-free part.
Rev. PrA | Page 18 of 19
Preliminary Technical Data NOTES
ADN2871
Rev. PrA | Page 19 of 19
PR05228-0-10/04(PrA)
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